如何设计上层软件基于Nand FLash

humatune

【文件名】:06421@52RD_SW_for_nand.pdf
【格　式】:pdf
【大　小】:476K
【简　介】:如何设计上层软件基于Nand FLash
【目　录】:
¡ á INTRODUCTION
1. SYSTEM INTERFACING
1-1. NAND Flash Architecture
1-2. Designing for Systems with O/S
1-3. Designing for O/S-less System
1-4. ECC Design Guide
1-5. Development Tool
2. INVALID BLOCK(S)
MANAGEMENT
2-1. Identifying Initial Invalid Block(s)
2-2. Management of Additional Invalid
Block(s)
2-3. Wear- Leveling Algorithm
2-4. Data Retention
2-5. Effect of P/E Cycling on Performance
3. PROGRAM/ERASE ALGORITHM
3-1. Erase Algorithm
3-2. Program Algorithm
3-3. Status Read Operation
3-4. Partial Page Program
4. OPERATING WITH COMMANDS
4-1. Prohibition of Unspecified Commands
4-2. Pointer Control for '00H', '01H', '50H’
4-3. Device Status after Read/Program/
Erase/Reset and Power-on
4-4. Acceptable Commands after
Sequential Input Command of '80H’
5. UTILIZING THE DEVICE IN THE
SAME SYSTEM DESIGN
5-1. Pin Assignment(4Mb,8Mb,16Mb,
32Mb,64Mb)
5-2. Pin Assignment(128Mb,256Mb)
5-3. Device ID Information
5-4. Addressing Map : 4Mb ~ 256Mb
5-5. Specification Comparison :
4Mb ~ 256Mb
5-6. Upgrading to 512Mb and 1Gb
6. HARDWARE DESIGN
CONSIDERATIONS
6-1. Acceptable Don`t-Care Area in
Each Operation
6-2. VccQ/ Vcc Power Configuration
6-3. Data Protection
6-4. R/B : Termination for the R/B Pin
7. MISCELLANEOUS
7-1. Device Behavior for WP/ Signal
7-2. Device Behavior for Excess Data
Input Cycles
7-3. Reset Operation

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hnmajun

上当了，就这个咚咚还要2RD

linjiefeng

我暈哦，怎麼都要錢啊

debowe

靠， datashit!![em03]