[讨论]红色飓风（Red Cyclone）系列FPGA开发板－－UART专题

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【文件名】:06417@52RD_7_4594_1.rar
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【简　介】:The Universal Asynchronous Receiver Transmitter (UART) is the most widely used serial data communication circuit ever. UARTs allow full duplex communication over serial communication links as RS232. The reference VHDL and Verilog code implements a UART in Xilinx CPLDs.
UARTs are available as inexpensive standard products from many semiconductor suppliers,
making it unlikely that this specific design is useful by itself.
The basic functions of a UART are a microprocessor interface, double buffering of tranmitter
data, frame generation, parity generation, parallel to serial conversion, double buffering of
receiver data, parity checking, serial to parallel conversion. The frame format of used by
UARTs is a low start bit, 5-8 data bits, optional parity bit, and 1 or 2 stop bits. Some UARTs
include modem interface signals. These are pass-through signals which are not done in this
design.
The organization of this application note is to provide a section on the receiver and then the transmitter.
The frame format for data transmitted/received by a UART is given in Figure 1. It consists of a high idle state of the line. A character is from 5-8 data bits. The start bit isLow and the single stop bit is High.
【目　录】:无目录

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【简　介】:The mini-UART is a fully functional, synthesizable,Universal Asynchronous Receiver Transmitter soft core,ideal for embedded processor applications or system-onprogrammable-chip.
The core is based upon the ultra-compact micro-UART core.(also from www.cmosexod.com) A dedicated synchronous micro-UART. All internal operations of the mini-UART can be controlled and programmed by the microprocessor bus.The external microprocessor can program the baud rate, the
interrupt masks and the transmit/receive buffers. A status
register can be polled in real-time to keep progress of the
transmitter as well as the receiver.
The mini-UART’s microprocessor bus interfaces seamlessly
with the PopCorn-V3 microprocessor core, or to any other
synchronous microprocessor bus such as most Intel
microcontrollers. Figure 1 illustrates the top level functional
block diagram.
【目　录】:
1.0 Introduction
2.0 Mini-UART IP Package
3.0 Software Interface
4.0 Hardware Interface
5.0 Microprocessor Interface Clock Domain Crossing
6.0 Programming Examples

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【文件名】:06417@52RD_7_4594_3.rar
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【简　介】:内容是图片;
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