TI OMAP3530 芯片资料

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The OMAP35x Applications Processor contains three multimedia card high-speed/secure data/secure
        digital I/O (MMC/SD/SDIO) host controller which provides an interface between a local host (LH) such as
        a microprocessor unit (MPU) or digital signal processor (DSP) and either MMC, SD memory cards, or
        SDIO cards and handles MMC/SD/SDIO transactions with minimal LH intervention.

        The application interface manages transaction semantics. The MMC/SD/SDIO host controller deals with
        MMC/SD/SDIO protocol at transmission level, data packing, adding cyclic redundancy checks (CRC),
        start/end bit, and checking for syntactical correctness.

        The application interface can send every MMC/SD/SDIO command and either poll for the status of the
        adapter or wait for an interrupt request, which is sent back in case of exceptions or to warn of end of
        operation.

        The application interface can read card responses or flag registers. It can also mask individual interrupt
        sources. All these operations can be performed by reading and writing control registers. The
        MMC/SD/SDIO host controller also supports two DMA channels.

            Note:    Some features may not be available or supported in your particular device. For more
                     information, see Chapter 1, the OMAP35x Family section, and your device-specific data
                     manual.

        There are three MMC/SD/SDIO host controllers inside the device: Figure 1-1 gives an overview of the
        MMC/SD/SDIO controller instances 1 and 3, and Figure 1-2 gives an overview of the MMC/SD/SDIO2
        controller instance.

10      Multimedia Card/Secure Digital/ Secure Digital I/O (MMC/SD/SDIO) Card Interface                    SPRUFD2C–April 2009
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【文件名】:11820@52RD_omap35xx technical reference manual sprufd2c.pdf
【格　式】:pdf
【大　小】:867K
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