The VHDL cookbook一本书 免费

Richards

【文件名】:06412@52RD_VHDLcookbook.rar
【格　式】:rar
【大　小】:238K
【简　介】:VHDL is a language for describing digital electronic systems. It arose
out of the United States Government’s Very High Speed Integrated Circuits
(VHSIC) program, initiated in 1980. In the course of this program, it
became clear that there was a need for a standard language for describing
the structure and function of integrated circuits (ICs). Hence the VHSIC
Hardware Description Language (VHDL) was developed, and subsequently
adopted as a standard by the Institute of Electrical and Electronic
Engineers (IEEE) in the US.
VHDL is designed to fill a number of needs in the design process.
Firstly, it allows description of the structure of a design, that is how it is
decomposed into sub-designs, and how those sub-designs are
interconnected. Secondly, it allows the specification of the function of
designs using familiar programming language forms. Thirdly, as a
result, it allows a design to be simulated before being manufactured, so that
designers can quickly compare alternatives and test for correctness without
the delay and expense of hardware prototyping.
The purpose of this booklet is to give you a quick introduction to VHDL.
This is done by informally describing the facilities provided by the
language, and using examples to illustrate them. This booklet does not
fully describe every aspect of the language. For such fine details, you
should consult the IEEE Standard VHDL Language Reference Manual.
However, be warned: the standard is like a legal document, and is very
difficult to read unless you are already familiar with the language. This
booklet does cover enough of the language for substantial model writing. It
assumes you know how to write computer programs using a conventional
programming language such as Pascal, C or Ada.
The remaining chapters of this booklet describe the various aspects of
VHDL in a bottom-up manner. Chapter2 describes the facilities of VHDL
which most resemble normal sequential programming languages. These
include data types, variables, expressions, sequential statements and
subprograms. Chapter3 then examines the facilities for describing the
structure of a module and how it it decomposed into sub-modules.
Chapter4 covers aspects of VHDL that integrate the programming
language features with a discrete event timing model to allow simulation of
behaviour. Chapter5 is a key chapter that shows how all these facilities are
combined to form a complete model of a system. Then Chapter6 is a potpourri
of more advanced features which you may find useful for modeling
more complex systems.
Throughout this booklet, the syntax of language features is presented in
Backus-Naur Form (BNF). The syntax specifications are drawn from the
IEEE VHDL Standard. Concrete examples are also given to illustrate the
language features. In some cases, some alternatives are omitted from BNF
【目　录】:
1. Introduction
2. VHDL is Like a Programming Language
3. VHDL Describes Structure
4. VHDL Describes Behaviour
5. Model Organisation
6. Advanced VHDL
7. Sample Models: The DP32 Processor