请教顶层文件修改后不能编译通过的原因？

bianjie

请教顶层文件修改后不能编译通过的原因？
软件：Quartus 5.1
问题现象：我的顶层文件是由5个模块构成的，顶层文件是用原理图构建的，模块是用VHDL写的，现在是只要我更改了5个模块中的任意一个，那怕是很小一点的改动，在编译程序时都不能通过，只有重新分配逻辑后方可通过编译，请问：我的问题出在那里，如何修改啊，谢谢！

错误指示如下：请指教，
Error: Fitter requires that more entities of type logic cell be placed in a region than are available in the region
        Error: Region "lower-left" corner: x17_y16; Region "upper-right" corner: x17_y16
        Inf Region constraint came from User Location Constraints
        Error: Region can accept 10 entities of type logic cell, but the Fitter needs to place 16 of them in this region
        Inf Placing the following cells in this region
                Inf Node "TS_Packet_Find_060218_a:inst|RST_27COUN"
                Inf Node "TS_Packet_Find_060218_a:inst|TSRATE_OUT[6]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7650"
                Inf Node "TS_Packet_Find_060218_a:inst|TSRATE_OUT[5]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7669"
                Inf Node "TS_Packet_Find_060218_a:inst|TSRATE_OUT[4]"
                Inf Node "TS_Packet_Find_060218_a:inst|TSRATE_OUT[12]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7687"
                Inf Node "TS_Packet_Find_060218_a:inst|TSRATE_OUT[3]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7705"
                Inf Node "TS_Packet_Find_060218_a:inst|TSRATE_OUT[2]"
                Inf Node "TS_Packet_Find_060218_a:inst|TSRATE_OUT[10]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7723"
                Inf Node "TS_Packet_Find_060218_a:inst|TSRATE_OUT[1]"
                Inf Node "TS_Packet_Find_060218_a:inst|TSRATE_OUT[9]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7741"
Error: Fitter requires that more entities of type logic cell be placed in a region than are available in the region
        Error: Region "lower-left" corner: x26_y13; Region "upper-right" corner: x26_y13
        Inf Region constraint came from User Location Constraints
        Error: Region can accept 10 entities of type logic cell, but the Fitter needs to place 17 of them in this region
        Inf Placing the following cells in this region
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[16]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7638"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[15]"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[31]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7655"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[14]"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[30]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7674"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[13]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7692"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[12]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7710"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[11]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7728"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[10]"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[26]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7746"
Error: Fitter requires that more entities of type logic cell be placed in a region than are available in the region
        Error: Region "lower-left" corner: x25_y13; Region "upper-right" corner: x25_y13
        Inf Region constraint came from User Location Constraints and Register Packing
        Error: Region can accept 10 entities of type logic cell, but the Fitter needs to place 15 of them in this region
        Inf Placing the following cells in this region
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[24]" (dual-output)
                        Inf Registered output is "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[24]"
                        Inf Combinational output is "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7632"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[23]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7653"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[22]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7672"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[21]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7690"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[20]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7708"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[19]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7726"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_EXT_TO_MCU[8]"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[17]"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[0]" (dual-output)
                        Inf Registered output is "PID_Interval_Monitor_060324_A:inst12|PCR_ERROR_BASE_TO_MCU[0]"
                        Inf Combinational output is "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7763"
                Inf Node "PID_Interval_Monitor_060324_A:inst12|LessThan~4802"
Error: Fitter requires that more entities of type logic cell be placed in a region than are available in the region
        Error: Region "lower-left" corner: x16_y16; Region "upper-right" corner: x16_y16
        Inf Region constraint came from User Location Constraints
        Error: Region can accept 10 entities of type logic cell, but the Fitter needs to place 11 of them in this region
        Inf Placing the following cells in this region
                Inf Node "TS_Packet_Find_060218_a:inst|TSRATE_OUT[0]"
                Inf Node "TS_Packet_Find_060218_a:inst|TSRATE_OUT[8]"
                Inf Node "FPGA_To_Rabbit2000_communication_060223_a:inst1|process2~7759"
                Inf Node "TS_Packet_Find_060218_a:inst|RATECOUNTER[7]"
                Inf Node "TS_Packet_Find_060218_a:inst|RATECOUNTER[6]"
                Inf Node "TS_Packet_Find_060218_a:inst|RATECOUNTER[5]"
                Inf Node "TS_Packet_Find_060218_a:inst|RATECOUNTER[4]"
                Inf Node "TS_Packet_Find_060218_a:inst|RATECOUNTER[3]"
                Inf Node "TS_Packet_Find_060218_a:inst|RATECOUNTER[2]"
                Inf Node "TS_Packet_Find_060218_a:inst|RATECOUNTER[1]"
                Inf Node "TS_Packet_Find_060218_a:inst|RATECOUNTER[0]"
Error: Can't fit design in device
Error: Quartus II Fitter was unsuccessful. 13 errors, 105 warnings
        Error: Processing ended: Fri Mar 31 09:47:55 2006
        Error: Elapsed time: 00:00:26
Error: Quartus II Full Compilation was unsuccessful. 13 errors, 116 warnings