quartus英文教程

Emmaley

【文件名】:06329@52RD_quartus英文教程.rar
【格　式】:rar
【大　小】:836K
【简　介】:This tutorial assumes that the reader has access to a computer on which Quartus II is installed. Instructions  for installing Quartus II are provided with the software. The Quartus II software will run on several different
types of computer systems. For this tutorial a computer running aMicrosoft operating system (Windows NT,Windows 2000, or Windows XP) is assumed. Although Quartus II operates similarly on all of the supported
types of computers, there are some minor differences. A reader who is not using a Microsoft Windows operating system may experience some slight discrepancies from this tutorial. Examples of potential differences
are the locations of files in the computer’s file system and the exact appearance of windows displayed by the  software. All such discrepancies are minor and will not affect the reader’s ability to follow the tutorial.
This tutorial does not describe how to use the operating system provided on the computer. We assume that the reader already knows how to perform actions such as running programs, operating a mouse, moving,
resizing, minimizing and maximizing windows, creating directories (folders) and files, and the like. A reader  who is not familiar with these procedures will need to learn how to use the computer’s operating system  before proceeding.
In this tutorial we describe how to use the physical design tools in Quartus II. In addition to the modules used in Tutorial 1, the following Quartus II modules are introduced: Fitter, Floorplan Editor, and Timing Analyzer. To illustrate the procedures involved, we will first implement the example verilog project created in Tutorial 1 in a MAX 7000 CPLD.
In this tutorial we focus on the physical implementation of a design project in a target device. We show how to manually choose which pins on a device package are used for the input and output signals in a circuit,and we describe how to use the Quartus II Programmer module to transfer a compiled design project into the selected PLD chip.
【目　录】:
B.1 Introduction
B.2 Starting a New Project
B.3 Design Entry Using Schematic Capture
B.4 Design Entry Using Verilog
B.5 Mixing Design-Entry Methods
B.6 Quartus IIWindows
C.1 Implementing a Circuit in a MAX 7000 CPLD
C.2 Implementing a Circuit in a Cyclone FPGA
C.3 Implementing an Adder using Quartus II
C.4 Using an LPM Module
C.5 Design of a Finite State Machine
C.6 Concluding Remarks
D.1 Making Pin Assignments
D.2 Downloading a Circuit into a Device
D.3 Concluding Remarks

ericliu2008

<P>太貴</P>

天堂雨

<P>我还有两个RD币啊，怎么买不了啊</P>

yongqin2005

别太黑了吧   又要钱啊