2005年niosII5.0最新练习讲义

abelardbe

【文件名】:06328@52RD_NiosII_SOPCBuilder_Labs_062105[1].part1.rar
【格　式】:rar
【大　小】:1457K
【简　介】:1. If it doesn’t exist already, create a directory on the C drive of your computer called“altera_trn”. Copy the self-extracting zip file nios_II_lab_QII5.0.exe to that directory and double click on it, and select unzip. This will unzip the lab files to a directory called
nios_II_lab. Among these files is the partially completed Quartus II project that we will use
today.
2. Start the Quartus II Software by double-clicking on the project file,
C:altera_trn
iosII_lab
iosII_lab.qpf..
3. Assign device family and pinout settings to the Quartus II project by sourcing one of the
TCL scripts provided. This will assign the relevant device settings and pinouts for the
particular FPGA development board you are using.
From the Tools menu select Tcl Scripts, and then from the Project folder choose the setup
script for your particular development board (eg. Setup_Cyclone_1C20.tcl, etc.), and click
Run.
(If you are unsure of which script to run please check the FPGA on your development board
or consult the workshop co-ordinator.)
4. Let’s now build our embedded system! Start SOPC Builder from Tools => SOPC
Builder… and provide the system name, niosII, when the next window pops up. You can
choose VHDL or Verilog (whichever you prefer) as the implementation language. The
blank SOPC builder window will open. Set Target to the particular dev kit you are using
(eg. Nios Development Board, Stratix EP1S10), and set the Clock frequency to 50 MHz.
【目　录】:无目录

abelardbe

【文件名】:06328@52RD_NiosII_SOPCBuilder_Labs_062105[1].part2.rar
【格　式】:rar
【大　小】:1186K
【简　介】:
【目　录】:

hitler2006

感谢   [em03]