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[资料] SM501芯片手册

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发表于 2009-2-9 22:47:05 | 显示全部楼层 |阅读模式
【文件名】:0929@52RD_SM501芯片手册.pdf
【格 式】:pdf
【大 小】:2220K
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2D显示芯片SM501

Silicon Motion, Inc.
SM501
Mobile Multimedia
Companion Chip
Databook
Version 1.01

Version 1.01 i - iii
Silicon Motion®, Inc. SM501 MMCC™ Databook
Company Confidential
Silicon Motion®, Inc.
SM501 MMCC Databook

Chip Versions
This document is applicable to revision AA of the SM501 (first production part).

Notice
Silicon Motion®, Inc. has made best efforts to ensure that the information contained in this document is accurate and reliable. However, the information is subject to change without notice. No responsibility is
assumed by Silicon Motion, Inc. for the use of this information, nor for infringements of patents or other rights
of third parties.

Copyright Notice
Copyright, 2003 Silicon Motion, Inc.
All rights reserved.
No part of this publication may be reproduced, photocopied, or transmitted in any form, without the prior written consent of Silicon Motion, Inc.
Silicon Motion, Inc. reserves the right to make changes to the product specification without reservation and without notice to our users.

Revision Record
Version Number Date Note
1.01 9/22/03
• Deleted Icc values in Table 18-2. (See SM501 Design Guide for more information about power supply design.)
• Changed title of Table 12-2 from “GPIO[15:0] in 16-bit...” to “GPIO[15:0] in 8-bit...”

1.0 8/18/03
All changes marked with change bars.
• Updated signal names in timing diagrams in Chapter 18.
• Added DC characteristics in Chapter 18.
• Incorporated errata 6/9/03 (new mechanical drawings for SM501, Figure 17-2)
• Changed name to Mobile Multimedia Companion Chip (MMCC)
• Changed version numbering to match the chip revision.
• Added ROP tables for 2D Control Register, Chapter 4
• Added expanded definitions of fields for 2D Source, 2D Destination, 2D Dimension, and 2D Control registers, Chapter 4
• Corrected variable names for Panel Registers, Chapter 5
• Added example for Video Scale Register, Chapter 5
• Changed XTALPWR voltage spec to 3.3V, Table 17-2 B-1 6/13/03
• Updated arrows in Figure 1-5 Hitachi SH4 to SM501 Bus Interface diagram
• Changed DRAM Control Register Bit 1
• Changed Table 17-2 Pin Descriptions B19 and B21 from Type O to I/O
• Changed Figure 18-10 SH4 Read Timing
• Changed Mode Select Register Bit 4
• Changed opening paragraph for 8051-Controlled External Bus Interface, and bit address modes.
• Miscellaneous Timing Changed bit 31:28 host clock and updated bit 23B 4/8/03
• Added Timing Waveforms and Parameter Tables to Specifications chapter
• Reformatted register descriptions
• Added Soldering Profile section to Chapter 18
• Replaced Voyager GX with SM501
• Updated 1:8 scaling in Chapter 1 with maximum power of 2 values (ZV Port and 2D Engine subsections)
• Updated arrows in Figure 10-1, ZV Port chapter
• Added Figure 17-1, Package Outline
• Renamed H18 to XTALPWR, D19 to PLLGND, E21 to PLLPWR
• Added new information in Chapter 2, under Power Mode Control register on PLLs, Power and Sleep Modes, Clock Frequency
• Added new field to bits [31:28] in Miscellaneous Timing register, Chapter 2
• Reorganized description of Configuration 1 & 2 registers in Chapter 2
• Added 1st/2nd clock entries to Table 1-3 A-1 2/14/03
• Global change to delete space between Voyager and GX
• Added ZV Port Timing Diagram to Chapter 18
• Deleted Pin J9, K9, L9, M9, N9 from pinout diagram 17-1
• Changed opening paragraph in Chapter 17
• Added Company Confidential in header
• Changed version number
• Added Chapter Titles to footer
• Added limits to Table 18-1
发表于 2009-4-2 14:01:39 | 显示全部楼层
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