|
朋友们大家好
我是做猎头行业的招聘顾问,目前我主要专注与IT,电信与金融行业,与我公司合作的客户主要是世界级的企业,我们始终以专业、诚信的态度面对客户与候选人,希望和大家多交流,认识并成为朋友。
如果大家对工作与职业发展有具体的问题进行咨询,希望把想法发送到我的邮箱中,这样我会看的更加认真,回复起来也会很方便。一般工作中用MSN,但工作比较繁忙,如果MSN中没能回复朋友们,也请大家见谅~
无论下面职位是否适合,都希望大家可以加我MSN或者发邮件以及CV,工作的发展想法给我,期待和大家相识,沟通,大家保持长期联系,给彼此一个机会。 [/COLOR][/COLOR]
在工作中相识Sue的朋友,希望大家多多给我提意见,Sue并不是猎头行业最最资深的招聘顾问,但是我希望与相信通过自己的努力与真诚我可以为大家提供专业的职场咨询服务与工作发展平台,感谢大家对我的帮助与支持!~
猎头不是挖墙角,而是把墙角的花放在花盆中
Email:sue.wang@iSearch-consultant.com.cn
Msn:sallear@hotmail.com
如有意向,请联系010-59627255-8009
Your sincerely Sue[/COLOR]
以下职位需要10人
Job Description- Senior FPGA/ASIC Verification engineerBasic:15w-22w/year[/COLOR]
Job Title: Senior FPGA/ASIC Verification engineer
Location: Beijing
5headcount
Knowledge and skills:
* knowledge in verification theory and methodology.
* Familiar with bus protocols like PCI, PCI-X, SPI-3, GigE.
* Knowledge in SystemVerilog or other HDL verification language is recommended.
* Knowledge in current industry standard verification methodologies such as VMM, RVM, OVM or AVM
* Knowledge in creating random constrained testbenches.
* Knowledge in maximizing verification code reuse through layered testbench construction.
* Knowledge and experience in Linux and Unix platform development and verification
* Knowledge in verification in Load Sharing environment is recommended.
* Knowledge in Script is recommanded.
* Experience in post simulation.
* Knowledge and experience in code coverage analyzing.
* Knowledge and experience in assertions.
* Knowledge and experience in FPGA/ASIC front end design is recommended.
Responsibility:
* Lead and instruct lower level verification engineers
* Design and implement the FPGA/ASIC verification environment and test cases
* responsible for corresponding documentations, writing, management and review.
* responsible for tracking and reporting status and design.
* managing regression test. [em01] |
|