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发表于 2007-8-22 09:15:39
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昨天整理了下。考虑发邮件比较麻烦，所以就把资料全部贴出来好了。后续的网友不需要留邮箱了，留邮箱的朋友，我也不发了。不好意思！
还有很多详细的资料可以上avr单片机的usb论坛。现给个网址：
http://www.obdev.at/developers/articles/00003.html
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USB设备分为高速（480Mbps），全速（12Mbps）和低速（1.5Mbps）。
1. 低速/全速设备速度识别
USB采用在D+或D-线上增加上拉电阻的方法来识别低速或全速设备，具体情况如下：
（1）低速设备的D-线上连有1.5K的电阻接高电平（3.0~3.6V）
（2）全速设备的D+线上连有1.5K的电阻接高电平。
（3）主控制器或集线器下行端口的D+和D-线上都连有15K的电阻接地。
当主控制器或集线器的下行端口上没有USB设备时，其D+和D-上的电压为0V；当低速设备连接后，在D-线上会出现15/（15+1.5）V的电压，而D+线上仍保持0V；同理，当全速设备连上时，D+线上会出现15/（15+1.5）V电压，而D-线上保持0V。如果这种状态持续2.5us以上，USB就认为低速/全速设备已经连接上。
2. 高速设备的识别
高速设备在连接起始时需以全速率与主机进行通信，以完成其配置操作，这时需要在D+上连接1.5K的电阻至高电平。当高速设备正常工作时，如果采用高速传输，D+线上不需使用上拉电阻。所以，为识别出高速USB设备，需要在上拉电阻和D+线之间的连接设置一个软件控制的开关。
For a USB 1.1 compatible low-speed device, a bit stream of 1.5 Mbit/s must be decoded. For a processor clocked at 12 MHz, this means that we have 8 CPU cycles for each bit. Being a RISC processor, the AVR executes most instructions in a single clock cycle. This gives us roughly 8 instructions to do the following operations on each bit:
NRZI decoding. A "1" is encoded as no change of the data lines, a "0" as a change. NRZI decoding can therefore be done by a negative exclusive or operation between the current status and the previous one (8 cycles earlier).
Bitstuff decoding. In order to preserve synchronization during long sequences of "1", a "0" (change of data lines) is inserted every 6 consecutive "1" bits. This "stuffed" bit must be removed during reception.
End of Packet recognition. The end of a packet is notified by a "SE0" condition. This means that both data lines (which are normally the inverse of each other) are at logical "0" level for two bit times.
In addition to these tasks, the received byte must be stored and a buffer overflow check performed every 8 data bits. |
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