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In the receiver, in addition to amplifying the input
signal and determining the digital value of the signal,
the sequence of the digital value must be extracted.
n The sequencing depends on the timing of the
sampling clock both in frequency and phase.
n Generally, the timing information is extracted from
either a reference clock or the timing information
embedded within the signal.
n The most common circuit that extracts the timing
information is a phase-locked loop. The primary
element of PLLs used for this purpose is the phase
and/or frequency detection circuits. |
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