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主要讲嵌入式硬件控制器的设计原理,非常细致
【文件名】:0757@52RD_echddemo(嵌入控制器硬件设计(英)) .pdf
【格 式】:pdf
【大 小】:883K
【简 介】:
【目 录】:
Chapter One Review of Electronics Fundamentals.......................1
Objectives........................................................................2
Embedded Microcomputer Applications..........................2
Microcomputer and Microcontroller Architectures...........4
Digital Hardware Concepts...............................................6
Logic Symbols................................................................17
Timing Diagrams............................................................19
Multiplexed Bus.............................................................20
Loading and Noise Margin Analysis................................21
The Design and Development Process............................21
Chapter One Problems...................................................22
Chapter Two Microcontroller Concepts.....................................23
Organization: von Neumann vs. Harvard.......................24
Microprocessor/Microcontroller Basics..........................24
The 8051 Family Microcontroller
Processor Architecture...............................................27
The 8051 Family Microcontroller
Instruction Set Summary...........................................42
Chapter Two Problems..................................................56
Chapter Three Worst-Case Timing, Loading,
Analysis, and Design.............................................57
Timing Diagram Notation Conventions.........................58
Fan-Out and Loading Analysis°(TM)DC and A.................63
Logic Family IC Characteristics and Interfacing.............75
Design Example: Noise Margin Analysis Spreadsheet.....82
Worst-Case Timing Analysis Example............................90
Chapter Three Review Problems....................................92
Chapter Four Memory Technologies and Interfacing.................95
Memory Taxonomy.......................................................96
Read/Write Memories..................................................100
Read-Only Memory.....................................................101
Other Memory Types...................................................104
JEDEC Memory Pin-Outs............................................105
Device Programmers....................................................106
Memory Organization Considerations..........................107
Parametric Considerations...........................................109
Asynchronous vs. Synchronous Memory......................110
Error Detection and Correction....................................111
Memory Management..................................................113
Chapter Four Problems................................................115
Chapter Five CPU Bus Interface and Timing........................,....117
Read and Write Operations....................................,.....117
Address, Data, and Control Buses...................,.............118
Address Spaces and Decoding...........................,...........120
Chapter Five Problems......................................,..........124
Chapter Six A Detailed Design Example.................................125
The Central Processing Unit (CPU).............................125
External Data Memory Cycles......................................134
Design Problem 1........................................................138
Design Problem 2........................................................139
Design Problem 3........................................................140
Chapter Six Problems..................................................143
Chapter Seven Programmable Logic Devices..............................145
Introduction to Programmable Logic............................147
Design Examples..........................................................153
Simple I/O Decoding and Interfacing Using PLDs.........157
IC Design Using PCs........................................................157
Chapter Seven Problems...............................................159
Chapter Eight Basic I/O Interfaces................................................161
Direct CPU I/O Interfacing...........................................161
Simple Input/Output Devices.......................................169
Program-Controlled I/O Bus Interfacing.......................173
Direct Memory Access (DMA).....................................175
Elementary I/O Devices and Applications.....................178
Chapter Eight Problems...............................................181
Chapter Nine Other Interfaces and Bus Cycles..........................183
Interrupt Cycles...........................................................184
Software Interrupts......................................................184
Hardware Interrupts....................................................184
Chapter Ten Other Useful Stuff...............................................197
Construction Methods.................................................197
Electromagnetic Compatibility....................................199
Electrostatic Discharge Effects.....................................199
Fault Tolerance...........................................................200
Hardware Development Tools......................................201
Software Development Tools.......................................203
Other Specialized Design Considerations....................203
Processor Performance Metrics...................................206
Device Selection Process.............................................207
Chapter Eleven Other Interfaces.................................................209
Analog Signal Conversion...........................................210
Special Proprietary Synchronous Serial Interfaces........211
Unconventional Use of DRAM for Low Cost
Data Storage............................................................211
Digital Signal Processing/Digital Audio Recording.......212
Appendix A Hardware Design Checklist.................................215
Appendix B References, Web Links, and Other Sources.........225
Index..........................................................................229
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