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楼主 |
发表于 2007-5-12 10:51:01
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对于第一个问题，我的意思是：不同时钟频率的影响，无法就两点：
1. 对tCL的设置,低时钟频率可以设置得小一点；
2. 涉及到tRAS、tRP、tRC、tRCD这些参数的，因为它们是以ns为单位的，不同时钟频率下需要的时钟周期数不一样。因此无法统一设定。我所说“交由用户自己”，就是指让用户自己在计算好的时机发出相应的命令。
具体可参考Altera的sdr_sdram IP。
对于March算法，上面说了，一般是半导体业内用于BIST（内嵌自检）的，建议你采用后者（写、读验证）即可。
当然了解一下也无不可，下面是google上一段话：
The March C algorithm, and its modifications, is a popular algorithm for memory testing. This algorithm, which consists of 11 operations (11n), writes and reads words of 0s, followed by writing/reading words of 1s, in both descending and ascending address spaces.
The original March C algorithm consists of the following steps:
1. Write 0s to all locations starting at the lowest address (initialization).
2. Read 0 at lowest address, write 1 at lowest address, repeating this series of operations until reaching the highest address.
3. Read 1 at lowest address, write 0 at lowest address, repeating this series of operations until reaching the highest address.
4. Read 0 from the lowest address to the highest address.
5. Read 0 at highest address, write 1 at highest address, repeating this series of operations until reaching the lowest address.
6. Read 1 at highest address, write 0 at highest address, repeating this series of operations until reaching the lowest address.
March C- : The algorithm modifies the March C algorithm by eliminating the redundant Read 0 operation between the ascending and descending address operations. Removing this operation reduces the algorithm from 11n to 10n, without sacrificing any fault coverage.
March C+ : The algorithm modifies the original March C algorithm by adding an extra read operation after each stage of the march. While increasing the algorithm from 10n (for the March C-) to 13n, this extra read allows additional fault detection, most notably, stuck-open faults for all types of RAM. It's also possible to add one more read operation at the end of the final stage, which increases the algorithm from 13n to 14n (commonly referred as March 14n).
Varying Data Backgrounds
The March C+ algorithm normally writes and reads words of either all 0s or all 1s. However, you can vary the value the March C+ test uses for each write/read operation. By varying the data values, or data backgrounds, you can increase the fault detection. For example, by intelligently choosing the data background from inductive fault analysis of the memory, the enhanced algorithm can detect state coupling faults between two cells of the same address, for which the March C+ algorithm cannot normally prove detection. |
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发表于 2007-4-30 11:36:10
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