Verilog速查手册

ysuwanglei

很有用的资料
Verilog速查手册
涵盖了大部分的基本逻辑单元的设计！
没有目录！
形式如下！！
Bit-select
Formal Definition:
The bit-select provides an access to individual bits of vectors.
Complete description: Language Reference Manual section ?.2.1.
Simplified Syntax:
vector_identifier[expression];
Description:
The bit-select can be used to access individual bits of vector net or register data types. The bits can be addressed by using an expression. If the expression value is out of bounds or it returns z or x values, then the value returned by the reference is x. If one or more bits of the address returned by the expression have an x or z value, then the address expression is x.
The bit-select can be applied to any net vectors, regs, integers, and time register data types. The bit-selection of a register declared as real or realtime is illegal.
Examples:
Example 1
reg [3:0] vect;
vect = 4'b0001;
If the value of address expression is 0 then returned value is 1 (vect[0] = 1).
If the value of address expression is 3 then returned value is 0 (vect[3] = 0).
If the value of address expression is 4 then returned value is x (vect[4] = x).
If the value of address expression is x or z then returned value is x (vect[1抌x] = x).


【文件名】:0732@52RD_Verilog速查手册.chm
【格　式】:chm
【大　小】:144K
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kolong

这个不是安装quartus 2 就有了吗....[em10]