请教：MTK的校准项目中TX IQ校准原理！

piao201314 · 发表于 2007-1-24 14:51:37

MTK中有TX IQ校准这一项，请问有谁能解释下TX IQ校准的原理及具体的校准过程？
还有IP2的校准原理及过程又是什么？
谢谢！

cylbailey · 发表于 2007-1-26 11:37:06

To completely understand it, you should review I/Q modulation / QPSK basis.
 I/Q signal is actually stream of odd/even bit of intended bit stream. first they are generated by I/Q modulator as they finally pass through independent output DACs and bandwidth filters, different I/Q convertion gain and DC offset occurs.
 As a countmeasure of those above, the signal should be have a "Pre-distortion" to some extent before pass output DACs and bandwidth filters, which is indeed I/Q gain trim and offset cancellation.
 I offset and Q offset are unit-less, and they correspond to a certain quantity of DC offset..... [br]+3 RD币[br]+3 RD币

piao201314 · 发表于 2007-1-24 14:51:37

MTK中有TX IQ校准这一项，请问有谁能解释下TX IQ校准的原理及具体的校准过程？
还有IP2的校准原理及过程又是什么？
谢谢！

tonish · 发表于 2007-1-24 15:09:47

我也想了解一下，哪位大侠给解释一下。[em14]

direnjie · 发表于 2007-1-24 21:16:31

I/Q补偿与相位均衡及直流漂移校准.[br]+1 RD币

cylbailey · 发表于 2007-1-24 23:58:13

<DIV class=quote>以下是引用piao201314在2007-1-24 14:51:37的发言：
MTK中有TX IQ校准这一项，请问有谁能解释下TX IQ校准的原理及具体的校准过程？
还有IP2的校准原理及过程又是什么？
谢谢！</DIV>

官方的算法是通过调节IQ offset来达到最佳的RMS phase error.
不过META里不是这个。[br]+5 RD币

piao201314 · 发表于 2007-1-25 09:20:28

这个我也清楚，TX IQ的校准就是DC Offset的校正，它是为了为了消除直流偏置，通常将DC Offset 向量化，可分为I Offset 和Q Offset，分别表示两个向量方向上的偏置，在校正的时候分别对I/Q Offset 进行校正。
但我不是很清楚的地方就是它是怎么一个算法，就象AFC时它会有频偏这个概念，TX IQ又是怎么一个过程呢？MTK的。
还有IP2又是怎样的呢？[br]+1 RD币

cylbailey · 发表于 2007-1-26 00:08:41

<DIV class=quote>以下是引用piao201314在2007-1-25 9:20:28的发言：
这个我也清楚，TX IQ的校准就是DC Offset的校正，它是为了为了消除直流偏置，通常将DC Offset 向量化，可分为I Offset 和Q Offset，分别表示两个向量方向上的偏置，在校正的时候分别对I/Q Offset 进行校正。
但我不是很清楚的地方就是它是怎么一个算法，就象AFC时它会有频偏这个概念，TX IQ又是怎么一个过程呢？MTK的。
还有IP2又是怎样的呢？

+1 RD币</DIV>

先贴个mtk的建议算法
1. Command Agilent 8960 or R&S CMU 200 to set band as PHASE_ERROR_BAND, BCCH carrier as
PHASE_ERROR_ARFCN, PCL as PHASE_ERROR_PCL, and TSC (training sequence code) as TSC. And read
BB TX parameter from NVRAM.
2. Command target to do baseband auto calibration by calling META_DLL API META_Rf_BBTXAutoCal().
3. Get BB TX parameter from target register by calling META_DLL API META_Rf_GetBBTxCfg2() and then save
BB TX parameter to structure rf_bb_tx_cfg2_req.
4. Command target to send normal burst by calling META_DLL API META_Rf_NB_TX().
5.Fetch RMS phase error from Agilent 8960 or R&S CMU 200.
6.If RMS phase error reading at step 5 is less than PHASE_ERROR_RMS_ERROR, phase error pre-check pass,
phase error calibration procedure is finish. Otherwise, go to step 7 to start OffsetI calibration.
7.Set begin_Offset_I = -32, end_Offset_I = 31.
8.Set cal_OffI1= (begin_Offset_I + (begin_Offset_IQ+end_Offset_I)/2)/2, and set rf_bb_tx_cfg2_req.
TxOffsetI=cal_OffI1.
9.Set BB TX parameter saved in structure rf_bb_tx_cfg2_req to target register by calling META_DLL
META_Rf_SetBBTxCfg2().
10.Command target to send normal burst by calling META_DLL API META_Rf_NB_TX().
11. Fetch RMS phase error from Agilent 8960 or R&S CMU 200 and save RMS phase error as RMSErr1.
12. Set cal_OffI2 = (end_Offset_I + (begin_Offset_IQ+end_Offset_I)/2)/2. and set rf_bb_tx_cfg2_req.
TxOffsetI=cal_OffI2.
13. Repeat step9~11, and saved RMS phase error as RMSErr2.
14. If abs(RMSErr1)< abs(RMSErr2), and abs(RMSErr1) < minRMSErr, set minOffI= cal_OffI1, minRMSErr=
abs(RMSErr1).
15. If abs(RMSErr1)< abs(RMSErr2), Set end_Offset_I = (begin_Offset_I+end_Offset_I)/2.
16. If abs(RMSErr1)>= abs(RMSErr2) and abs(RMSErr2) < minRMSErr, set minOffI= cal_OffI2, minRMSErr=
abs(RMSErr2).
17. If abs(RMSErr1)>= abs(RMSErr2), Set begin_Offset_I = (begin_Offset_I+end_Offset_I)/2 + 1.
18. Repeat step 8~17 until the following condition occurred, minRMSErr=0, cal_OffI1>=cal_OffI2.
19. Repeat step 7~18 to do OffsetQ calibration.
20. Command target to send normal burst by calling META_DLL API META_Rf_NB_TX().
21. Fetch RMS phase error from Agilent 8960 or R&S CMU 200 and save RMS phase error as RMSErrCheck.
22. If RMSErrCheck<=PHASE_ERROR_RMS_ERROR, set rf_bb_tx_cfg2_req.bbtx_isCalibrated=191, phase
error check pass. Otherwise, set set rf_bb_tx_cfg2_req.bbtx_isCalibrated=0.
实际factory里的不是这个，要更复杂一些，牵涉到一些信号的建模。
IP2一般是针对direct down mixing架构的TC所特有的项，意义是消除LO self-mixing 所带来的直流偏置[br]+1 RD币[br]+5 RD币

piao201314 · 发表于 2007-1-26 08:21:40

唉，这个玩意我也有，这是算法，过于复杂了。
那么就问：I Offset 和Q Offset单位是什么？？怎么体现的呢？

cylbailey · 发表于 2007-1-26 11:37:06

To completely understand it, you should review I/Q modulation / QPSK basis.
 I/Q signal is actually stream of odd/even bit of intended bit stream. first they are generated by I/Q modulator as they finally pass through independent output DACs and bandwidth filters, different I/Q convertion gain and DC offset occurs.
 As a countmeasure of those above, the signal should be have a "Pre-distortion" to some extent before pass output DACs and bandwidth filters, which is indeed I/Q gain trim and offset cancellation.
 I offset and Q offset are unit-less, and they correspond to a certain quantity of DC offset..... [br]+3 RD币[br]+3 RD币

piao201314 · 发表于 2007-1-26 11:55:19

非常感谢！
真的还要好好学习啊！

tonish · 发表于 2007-1-24 15:09:47

我也想了解一下，哪位大侠给解释一下。[em14]

direnjie · 发表于 2007-1-24 21:16:31

I/Q补偿与相位均衡及直流漂移校准.[br]+1 RD币

cylbailey · 发表于 2007-1-24 23:58:13

<DIV class=quote>以下是引用piao201314在2007-1-24 14:51:37的发言：
MTK中有TX IQ校准这一项，请问有谁能解释下TX IQ校准的原理及具体的校准过程？
还有IP2的校准原理及过程又是什么？
谢谢！</DIV>

官方的算法是通过调节IQ offset来达到最佳的RMS phase error.
不过META里不是这个。[br]+5 RD币

piao201314 · 发表于 2007-1-25 09:20:28

这个我也清楚，TX IQ的校准就是DC Offset的校正，它是为了为了消除直流偏置，通常将DC Offset 向量化，可分为I Offset 和Q Offset，分别表示两个向量方向上的偏置，在校正的时候分别对I/Q Offset 进行校正。
但我不是很清楚的地方就是它是怎么一个算法，就象AFC时它会有频偏这个概念，TX IQ又是怎么一个过程呢？MTK的。
还有IP2又是怎样的呢？[br]+1 RD币

cylbailey · 发表于 2007-1-26 00:08:41

<DIV class=quote>以下是引用piao201314在2007-1-25 9:20:28的发言：
这个我也清楚，TX IQ的校准就是DC Offset的校正，它是为了为了消除直流偏置，通常将DC Offset 向量化，可分为I Offset 和Q Offset，分别表示两个向量方向上的偏置，在校正的时候分别对I/Q Offset 进行校正。
但我不是很清楚的地方就是它是怎么一个算法，就象AFC时它会有频偏这个概念，TX IQ又是怎么一个过程呢？MTK的。
还有IP2又是怎样的呢？

+1 RD币</DIV>

先贴个mtk的建议算法
1. Command Agilent 8960 or R&S CMU 200 to set band as PHASE_ERROR_BAND, BCCH carrier as
PHASE_ERROR_ARFCN, PCL as PHASE_ERROR_PCL, and TSC (training sequence code) as TSC. And read
BB TX parameter from NVRAM.
2. Command target to do baseband auto calibration by calling META_DLL API META_Rf_BBTXAutoCal().
3. Get BB TX parameter from target register by calling META_DLL API META_Rf_GetBBTxCfg2() and then save
BB TX parameter to structure rf_bb_tx_cfg2_req.
4. Command target to send normal burst by calling META_DLL API META_Rf_NB_TX().
5.Fetch RMS phase error from Agilent 8960 or R&S CMU 200.
6.If RMS phase error reading at step 5 is less than PHASE_ERROR_RMS_ERROR, phase error pre-check pass,
phase error calibration procedure is finish. Otherwise, go to step 7 to start OffsetI calibration.
7.Set begin_Offset_I = -32, end_Offset_I = 31.
8.Set cal_OffI1= (begin_Offset_I + (begin_Offset_IQ+end_Offset_I)/2)/2, and set rf_bb_tx_cfg2_req.
TxOffsetI=cal_OffI1.
9.Set BB TX parameter saved in structure rf_bb_tx_cfg2_req to target register by calling META_DLL
META_Rf_SetBBTxCfg2().
10.Command target to send normal burst by calling META_DLL API META_Rf_NB_TX().
11. Fetch RMS phase error from Agilent 8960 or R&S CMU 200 and save RMS phase error as RMSErr1.
12. Set cal_OffI2 = (end_Offset_I + (begin_Offset_IQ+end_Offset_I)/2)/2. and set rf_bb_tx_cfg2_req.
TxOffsetI=cal_OffI2.
13. Repeat step9~11, and saved RMS phase error as RMSErr2.
14. If abs(RMSErr1)< abs(RMSErr2), and abs(RMSErr1) < minRMSErr, set minOffI= cal_OffI1, minRMSErr=
abs(RMSErr1).
15. If abs(RMSErr1)< abs(RMSErr2), Set end_Offset_I = (begin_Offset_I+end_Offset_I)/2.
16. If abs(RMSErr1)>= abs(RMSErr2) and abs(RMSErr2) < minRMSErr, set minOffI= cal_OffI2, minRMSErr=
abs(RMSErr2).
17. If abs(RMSErr1)>= abs(RMSErr2), Set begin_Offset_I = (begin_Offset_I+end_Offset_I)/2 + 1.
18. Repeat step 8~17 until the following condition occurred, minRMSErr=0, cal_OffI1>=cal_OffI2.
19. Repeat step 7~18 to do OffsetQ calibration.
20. Command target to send normal burst by calling META_DLL API META_Rf_NB_TX().
21. Fetch RMS phase error from Agilent 8960 or R&S CMU 200 and save RMS phase error as RMSErrCheck.
22. If RMSErrCheck<=PHASE_ERROR_RMS_ERROR, set rf_bb_tx_cfg2_req.bbtx_isCalibrated=191, phase
error check pass. Otherwise, set set rf_bb_tx_cfg2_req.bbtx_isCalibrated=0.
实际factory里的不是这个，要更复杂一些，牵涉到一些信号的建模。
IP2一般是针对direct down mixing架构的TC所特有的项，意义是消除LO self-mixing 所带来的直流偏置[br]+1 RD币[br]+5 RD币

piao201314 · 发表于 2007-1-26 08:21:40

唉，这个玩意我也有，这是算法，过于复杂了。
那么就问：I Offset 和Q Offset单位是什么？？怎么体现的呢？

piao201314 · 发表于 2007-1-26 11:55:19

非常感谢！
真的还要好好学习啊！

hjhrd · 发表于 2007-2-10 14:52:45

太厉害了

csbstar · 发表于 2009-3-27 20:24:26

谢谢了！
[em01][em02]

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