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【文件名】:06920@52RD_A Hardware Architecture of MIMO-OFDM Synchronizer.pdf
【格 式】:pdf
【大 小】:572K
【简 介】:Abstract- In this paper, a hardware architecture for MIMOOFDM
system synchronizer is presented.The proposed synchronization
unit can achieve synchronization in the time-domain
and frequency-domain. The time-domain synchronization can
be achieved by a group of matched filters of ZCZ codes.
Since MIMO-OFDM system have multiple transmitting antennas
and multiple receiving antennas, every receiving antenna can
receive the signal from all transmitting antennas. When the
all sub-channels delay between receiving/transmitting antennas
are different, every frame detection in receiving antennas will
be interfered from other transmitting preamble. the proposed
matched filter of ZCZ code can solve the problem. On the other
hand the synchronizer unit also perform the frequency offset
estimation and correction with two long training symbol in the
preamble. At last,the hardware architecture of synchronizer is
given and implemented with EP20K1500E device of Altera's
APEX DSP development board.
【目 录】:
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