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【文件名】:06914@52RD_lvds_ch3.pdf
【格 式】:pdf
【大 小】:278K
【简 介】:3.1 PCB layout tips
As a technology, LVDS is relevant in systems where the data rates range from around 100 MHz to 2 GHz.
At these frequencies a PCB can no longer be treated as a simple collection of interconnects. Traces carrying
these high-speed signals need to be treated like transmission lines. These transmission lines should be designed
with appropriate impedance and they need to be correctly terminated.
The topics covered in this chapter range from impedance calculations and signal integrity to proper powersupply
design. They are relevant for any high-speed design, whether it employs ECL, CML, or LVDS.
Generalized design recommendations are provided next.
【目 录】:
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