digital filter design and synthesis using high level modeling tools

youshenglin

TABLE OF CONTENTS
Abstract............................................................................................................................................ ii
Table of Contents ............................................................................................................................ iii
Chapter 1: Introduction....................................................................................................................1
Chapter 2: Quantization...................................................................................................................3
2.1: Quantization ..............................................................................................................................3
2.2: Quantization Noise ....................................................................................................................3
2.3: Two’s Complement Representation ..........................................................................................3
2.4: Two’s Complement Truncation..................................................................................................3
2.5: Two’s Complement Rounding ...................................................................................................4
2.6: Finite-Precision Effects..............................................................................................................4
2.7: Limit-Cycle Oscillations .............................................................................................................5
Chapter 3: IIR Digital Filter Structures..............................................................................................7
3.1: Linear Time-Invariant Systems..................................................................................................7
3.2: Difference equations and Recursive Systems ..........................................................................7
3.3: Infinite Impulse Response (IIR) Digital Filters ...........................................................................8
3.4: Hardware Consideration..........................................................................................................10
3.4.1: Parallel-Form Structure ........................................................................................................10
3.4.2: Cascade-Form Structure ......................................................................................................12
Chapter 4: Digital Filter Designs.....................................................................................................14
Chapter 5: COSSAP Saturation Modes for Fixed-point Binary Adders .........................................16
5.1: Overflow in Binary Addition .....................................................................................................16
5.2: COSSAP Saturation Modes ....................................................................................................16
Chapter 6: COSSAP Round-off Modes for Fixed-point Binary Multipliers .....................................20
Chapter 7: Editing VHDL-dumped Code Produced from COSSAP ...............................................25
7.1: Designing IIR Filters in COSSAP Block Diagram Editor .........................................................25
7.2: Deficiencies in the VHDL code generated by xvcg ................................................................27
7.2.1: Fixed-point Multiplier Sub-blocks .........................................................................................27
7.2.2: Fixed-point Adder Sub-blocks ..............................................................................................27
7.2.3: Fixed-point Delay Sub-blocks...............................................................................................29
7.3: Designing IIR Filters in VHDL..................................................................................................29
Chapter 8: Digital Filter Design Procedures Using High-level Tools..............................................31
8.1: IIR Digital Filter Design Flowchart ...........................................................................................31
8.2: Description of Flowchart Steps................................................................................................33
Chapter 9: Results of IIR Digital Filter Design Methodology..........................................................40
9.1: 16-bit Butterworth Lowpass Filter Design................................................................................40
9.1.1: Parallel Structure Implementation of Butterworth Lowpass Filter ........................................43
9.1.1.1: Results of Validation Test #1.............................................................................................57
9.1.1.2: Results of Validation Test #2.............................................................................................61
9.1.2: Cascade Structure Implementation of Butterworth Lowpass Filter ......................................66
9.1.2.1: Results of Validation Test #1.............................................................................................73
9.1.2.2: Results of Validation Test #2.............................................................................................74
9.1.3: VHDL Synthesis of Parallel Structure...................................................................................78
9.1.4: VHDL Synthesis of Cascade Structure ................................................................................79
Chapter 10: Results of Design Methodology for DSP Applications ...............................................80
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youshenglin

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youshenglin

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TANZUJIANHAO

这啥都看不了