Synthesizer design for microwave applications

su8848

Phase Locked Loop (PLL) is a fundamental part of radio, wireless and telecommunication
technology. The goal of this document is to review the theory, design and analysis of PLL
circuits. PLL is a simple negative feedback architecture that allows economic
multiplication of crystal frequencies by large variable numbers. By studying the loop
components and their reaction to various noise sources, we will show that PLL is
uniquely suited for generation of stable, low noise tunable RF signals for radio, timing and
wireless applications.

【文件名】:06825@52RD_Synthesizers.zip
【格　式】:zip
【大　小】:2506K
【简　介】:
【目　录】:

tangyi

怎么没有人评价一下!!!

myghguo

Rohde的文章，谢谢楼主