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CPU verification engineer (emulation)
Responsibilities:
1. The candidate will be responsible fordesign verification of an exciting CPU project, with the focus on emulation andFPGA.
2. To investigate and implement the methodology of efficient debugging onemulation environment, for example, hybrid environment and cosim,checkpointing, synthesizable SVA, etc.
3. To develop and execute verification plans the top level or SOC level onemulation environment.
Qualifications:
1. The ideal candidate should have a MS or higher degree with hands-on CPUdesign verification experience.
2. Experiences of one of the mainstream emulation platform is a big plus, forexample Cadence’sPalladium, Mentor Graphics’ Veloce, or Synopsys’s Zebu.
3. Experiences of FPGA prototyping is a plus.
4. Experiences of synthesizable SVA is a plus.
5. Low level software knowledge such as uboot or Linux kernel is desired.
6. Be familiar with ARM assembly language is a big plus.
7. Be familiar with ARM tool chain is a plus.
地点:上海 北京 厦门
电话/微信:15906668955
邮箱:lynn.zhang@engageway.com |
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