wooley的论文

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【简　介】:一、RAPID growth in the demand for portable, battery operated electronics for communications, computing, and consumer applications, as well as the continued scaling of very large scaled integration (VLSI) technology, has begun to significantly alter the constraints under which many semiconductor integrated circuits are designed. In particular, in order to both conserve power in digital circuits and reduce the high electric fields that accompany the scaling of device dimensions, it is becoming necessary for circuits to operate from reduced supply voltages. Without the use of voltage
regulation, the minimum supply voltage in portable equipment is generally the end-of-life battery voltage multiplied by the number of cells connected in series.
二、THE RAPID growth in both wired and wireless communication systems has stimulated the development of data conversion interfaces that can be integrated in standard CMOS technologies while meeting stringent resolution and linearity requirements at increasing Nyquist conversion rates. Emerging
standards and services all show a trend toward increased signal bandwidth, thus driving the sampling rates at which baseband signals are encoded into the range of several megahertz. For example,services based on various digital subscriber line (DSL) protocols are emerging as means of providing data communication rates of several megabits per second. Similarly, the baseband digitization of a single channel in spread-spectrum radio systems requires sampling rates of several megahertz. Even in systems such as the Global System for Mobile communications(GSM), with signal bandwidths of only 100 kHz, baseband sampling rates in the megahertz range are desired to allow for multichannel digitization followed by digital channel selection.
三、VERSAMPLED analog-to-digital (A/D) converters  based on sigma-delta (CA) modulation have previ-ously been used for high-resolution signal acquisition in voice-band telecommunications, digital audio, and ISDN
applications. In these applications, the use of oversam-pling techniques has resulted in robust implementations by exploiting the enhanced speed and circuit density of scaled VLSI technologies to overcome resolution limita-
tions resulting from component mismatch and reduced supply voltages. This work examines the application of oversampling techniques to A/D conversion at rates ex-ceeding 1 MHz with a resolution of 12 b or more. While Nyquist-rate converters are capable of achieving this level of performance in a CMOS technology using a pipelined architecture [ 11, there are several distinct advantages to using an oversampling approach. Oversampled A/D con-
verters can achieve high resolution without trimming or calibration because of their tolerance for component mis-match and circuit nonidealities. These converters also simplify system integration by reducing the burden on the
supporting analog circuitry. Specifically, they do not re-quire precision sample-and-hold circuitry and they relax the performance requirements on the analog antialias filter that precedes the sampling operation. Oversampled
A/D converters include an inherent digital filtering capa-bility and their resolution versus conversion rate is easily tailored to allow use of the same converter in a variety of applications.
【目　录】:
一、I. INTRODUCTION
II. FUNDAMENTAL LIMITS
III. MODULATOR DESIGN
IV. EXPERIMENTAL RESULTS
V. CONCLUSION
二、I. INTRODUCTION
II. MODULATION AT HIGH CONVERSION RATES
III. DAC LINEARIZATION
IV. MODULATOR ARCHITECTURE
V. CIRCUIT IMPLEMENTATION
VI. EXPERIMENTAL RESULTS
VII. CONCLUSION
三、I. INTRODUCTION
11. CASCADED MULTIBIT XA MODULATOR
111. IMPLEMENTATION
IV. CIRCUIT DESIGN
V. EXPERIMENTAL RESULTS
VI. CONCLUSION

Queena

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【简　介】:一、THE recent explosion of interest in wireless personal communications systems is motivating the development
of fully integrated radio receivers with particular attention
directed toward reducing power dissipation and ensuring flexibility
in the system architecture. By increasing the level of
integration in the signal path, a receiver can be realized with a
more compact form factor at reduced cost and with greater
reliability. In addition, higher levels of integration reduce
the need for the constituent analog and mixed-signal circuit
blocks to drive large pad and package parasitic capacitances,
thereby conserving power. Aggressive utilization of very large
scale integration (VLSI) technology also enables the combined
integration of a bandpass or baseband analog-to-digital (A/D)
converter along with the traditional front-end receiver building
blocks. In this manner, the back-end signal processing can
be shifted from the analog domain into the digital domain.
Digital processing of the baseband signal is rapidly becoming
a necessity because emerging standards such as IS-54, IS-95
CDMA, and GSM encompass bandwidth-efficient modulation schemes, as well as compression, error correction, and possibly spread spectrum techniques, that require substantial digital processing [1], [2].
二、sTRONG cost and performance incentives encourage the
design of analog-to-digital and digital-to-analog converters
that are amenable to integration on the same silicon
substrate as digital signal processing circuitry. The low parasitic
capacitances and small feature sizes characteristic of
VLSI technologies allow operation at high clock rates. However,
the poor component matching and reduced power
supply levels that accompany these technologies generally
mean that error correction techniques must be used to
implement precision analog-to-digital converters that sample
input signals at the Nyquist rate. Conversely, oversampled
analog-to-digital converters based on sigma–delta (2A) modulation
are well suited for implementation in a VLSI technology
because they provide an efficient means of exchanging
speed for resolution. They are especially tolerant of
circuit nonidealities and component mismatch. Additionally,
the largest component of these converters is a digital filter
that benefits directly from the enhanced circuit density and
continued scaling of VLSI technology.

【目　录】:
一、I. INTRODUCTION
II. HIGH FREQUENCY PERFORMANCE IMPAIRMENTS
III. -PATH DESIGN ISSUES
IV. MODULATOR IMPLEMENTATION
V. EXPERIMENTAL RESULTS
VI. CONCLUSION
二、I.INTRODUCTION
II. ARCHITECTURES FOR 2A MODULATION
III. IMPLEMENTATIONOF SECOND-ORDER 2A MODULATORS
IV. MODULATOR DESIGN
V. EXPERIMENTAL RESULTS
VI. QUANTIZATION NOISE SPECTRA
VII. CONCLUSION

Queena

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【简　介】:一、oVERSAMPLED analog-to-digital (A/D) converters based on sigma–delta (2A) modulation have previously been used for high-resolution signal acquisition in voice-band telecommunications, digital audio, and ISDN
applications. In these applications, the use of oversampling techniques has resulted in robust implementations by exploiting the enhanced speed and circuit density of scaled VLSI technologies to overcome resolution limitations
resulting from component mismatch and reduced supply voltages. This work examines the application of oversampling techniques to A/D conversion at rates exceeding 1 MHz with a resolution of 12 b or more. While Nyquist-rate converters are capable of achieving this level of performance in a CMOS technology using a pipelined architecture [1], there are several distinct advantages to using an oversampling approach. Oversampled A/D converters
can achieve high resolution without trimming or calibration because of their tolerance for component mismatch and circuit nonidealities. These converters also simplify system integration by reducing the burden on the supporting analog circuitry. Specifically, they do not re-quire precision sample-and-hold circuitry and they relax the performance requirements on the analog antialias
filter that precedes the sampling operation. Oversampled A/D converters include an inherent digital filtering capability and their resolution versus conversion rate is easily tailored to allow use of the same converter in a variety of applications.
二、SIGNAL PROCESSING systems can be divided into S data acquisition and data processing components.While modern VLSI technology greatly simplifies imple-mentation of the processing function by digital means, the same is not true for data acquisition, where analog signals must typically be conditioned and then converted to dig-ital codes. A large number of transistors of small size and high speed are needed for digital processing, whereas conventional means of implementing the analog-to-digital (A/D) conversion function call for a variety of high-pre-cision components. As a result, A/D converters are often
implemented using special integrated circuit processes and are fabricated as separate chips. This approach is ineffi-cient in that it both fails to take full advantage of VLSI technology and complicates system implementation by re-
quiring multiple processes and chip sets. There is thus a pressing need for robust AID conversion techniques that are insensitive to component variations and are compati-ble with VLSI technology. Oversampling is one approach to meeting this need.
【目　录】:
一、I. INTRODUCTION
II. CASCADED MULTIBIT ZA MODULATOR
111. lMPLEMENTATION
IV. CIRCUIT DESIGN
V. EXPERIMENTAL RESULTS
VI. CONCLUSION
二、I. INTRODUCTION
11. PERFORMANCE OF OVERSAMPLED A/D CONVERTERS
111. SINUSOIDAL MINIMUM ERROR METHOD
IV. PERFORMANCE SPECIFICATION
V . PRACTICAL CONSIDERATIONS
VI. COMPARISON WITH OTHER TECHNIQUES
VII. CONCLUSIONS