Designing Bipolar Transistor Radio Frequency Integrated Circuits

hualinmoon

Designing Bipolar Transistor Radio
Frequency Integrated Circuits    专讲Bipolar RFIC  共3部分
Contents
Acknowledgments ix
CHAPTER 1
Introduction 1
References 11
CHAPTER 2
Applications 13
2.1 Cellular/PCS Handsets 13
2.2 Cellular/PCS Infrastructure 15
2.3 WLANs 16
2.4 Bluetooth 17
2.5 UWB 18
2.6 WiMax 19
2.7 Digital TV and Set-Top Boxes 20
2.8 Cognitive Radio 20
2.9 Spectrum Allocation in the United States (All Frequencies
2.9 in Megahertz) 21
2.10 Physical Layer Standards 22
References 24
CHAPTER 3
RFIC Architectures 25
3.1 I/Q Receivers 25
3.2 I/Q Modulators 30
3.3 Nonzero IF Receivers 32
3.4 Zero IF Receivers 37
3.5 Differential versus Single-Ended Topologies 41
References 41
CHAPTER 4
InGaP/GaAs HBT Fabrication Technology 43
4.1 Transistor Structures 43
4.2 Device Models 45
4.3 Passive Structures, Their Electrical Models, and Layout Design Rules 48
4.3.1 Microstrip Lines 53
4.3.2 TFR Resistors 55
vii
4.3.3 M1-to-M2 Vias 57
4.3.4 MIM Capacitors 57
4.3.5 Substrate Vias 58
4.3.6 Bonding Pads 60
4.3.7 Crossover Capacitances 61
4.3.8 Spiral Inductors 62
4.3.9 Transistor Dummy Cells 64
4.3.10 Significant Layout Parasitic Elements 65
4.3.11 Simple Layout Example 65
4.4 Maximum Electrical Ratings 67
4.5 CAD Layout Tools 70
References 70
CHAPTER 5
SiGe HBT Fabrication Technology 71
5.1 SiGe HBT Transistor Structures 71
5.2 Transistor Device Models 79
5.3 Passive Device Structures and Models 81
5.4 Design Rules 86
5.5 CAD Layout 86
References 87
CHAPTER 6
Passive Circuit Design 89
6.1 Low-Pass Filters 89
6.2 High-Pass Filters 93
6.3 Band-Pass Filters 93
6.4 Differential Filters 95
6.5 Technology and Substrates 99
6.6 Splitters/Dividers 99
6.7 Phase Shifters and Baluns 102
References 104
CHAPTER 7
Amplifier Design Basics 105
7.1 Matching Techniques 105
7.2 Gain Compensation 106
7.3 Fano’s Limit 106
7.4 Stability 107
7.5 Noise Match 109
7.6 Differential Amplifiers 109
7.7 Cascode Amplifiers 111
References 113
CHAPTER 8
Low-Noise Amplifier Design 115
8.1 Noise Figure Concepts 115
viii Contents
8.2 Noise Temperature 116
8.3 Front-end Attenuation and LNAs 117
8.4 Multistage Noise Figure Contributions 117
8.5 Circuit Topologies for Low Noise 118
8.6 Design Example 1: Single-Ended PCS LNA 126
8.7 Design Example 2: Three-Transistor Hybrid Darlington
8.7 Differential LNA Using SiGe Technology 127
References 132
CHAPTER 9
Power Amplifier Design 133
9.1 Loadline Concepts 134
9.2 Maximum Power and Efficiency 136
9.3 Class AB Power Amplifiers 139
9.4 Definitions of Nonlinear Performance Metrics 141
9.5 Adjacent Channel Power Ratio 145
9.6 Error Vector Magnitude 146
9.7 Circuit Topologies for PAs 147
9.8 Matching Circuit Options 149
9.9 Stability 150
9.10 Bias Circuits 150
9.11 Design Example 3: Wideband Gain Block Darlington Amplifier 154
9.12 Design Example 4: Feedback Power Amplifier Design 164
References 171
CHAPTER 10
Designing Multistage Amplifiers 173
10.1 Multistage LNAs 173
10.2 Multistage Power Amplifiers 175
10.3 Gain and Power Allocations 177
10.4 Active Device Sizing 177
10.5 Design Example 5: A Differential PCS PA 181
References 194
CHAPTER 11
Mixer/Modulator Design 195
11.1 Mixer Basics 195
11.2 Diode Mixers 197
11.3 Single-Balanced Active Multiplying Mixers 200
11.4 Fully Balanced Active Multiplying Mixers (Gilbert cell) 205
11.5 I/Q Mixers 217
11.6 I/Q Modulators 219
11.7 Design Example 6: Cellular/PCS Downconverting Mixer RFIC 221
References 230
CHAPTER 12
Frequency Multiplier Design 231
Contents ix
12.1 Frequency Doublers 231
12.2 Frequency Triplers 233
12.3 Frequency Translators 235
References 239
CHAPTER 13
Voltage-Controlled Oscillator Design 241
13.1 Varactor Diode Basics 242
13.2 Negative-Resistance Concepts 248
13.3 Types of Resonators 252
13.4 Feedback Circuit Topologies for Producing Negative Resistance 252
13.4.1 Negative-Resistance Oscillator Circuits 252
13.4.2 The Colpitts Oscillator Circuit 258
13.5 Frequency-Temperature Stability 261
13.6 Phase Noise 263
13.7 Quadrature Phase-Shifting Networks 266
13.8 Ring Oscillators 267
13.9 Design Example 7: 802.11a (Wi-Fi A) Differential VCO 272
13.10 Figure of Merit 278
13.11 Electronic Tuning and a Differential VCO Topology 279
References 281
CHAPTER 14
Layout Design Strategies 283
14.1 Minimum Area 283
14.2 “On-Chip” versus “Off-Chip” Component Decisions 283
14.3 Minimizing Parasitics 284
14.4 Testability 285
14.5 Types of CAD Systems 286
14.6 Foundry Comparison 287
14.7 Reticle Assembly 289
CHAPTER 15
RFIC Economics 293
15.1 Levels of Integration 293
15.2 Single-Ended versus Differential Topologies 294
15.3 Process Technology Choices 295
15.4 Area versus Performance Trade-offs 296
15.5 Electrical Yield 297
15.6 Prototype Costs 298
15.7 Production Costs 298
Acronyms 301
About the Author 305
Index 30
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