【文件名】:0651@52RD_FIFO.rar
【格 式】:rar
【大 小】:225K
【简 介】:This paper will detail one method that is used to design, synthesize and analyze a safe FIFO between different clock domains using Gray code pointers that are synchronized into a different clock domain before testing for "FIFO full"or "FIFO empty" conditions. The fully coded, synthesized and analyzed RTL Verilog model (FIFO Style #1) is included.
包括两个PDF文档，每个PDF将近20页
【目 录】:
IP卡
狗仔卡
发表于 2006-5-1 15:04:00
提升卡
置顶卡
沉默卡
喧嚣卡
变色卡
显身卡