【文件名】:12731@52RD_EFFICIENCY ENHANCEMENT OF BASE STATION POWER AMPLIFIERS USING DOHERTY TECHNIQUE.pdf
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Table of Contents
Abstract………………………………………………………………………….
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Acknowledgements……………………………………………………………...
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Table of Contents……………………………………………………………….
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List of Figures…………………………………………………………………...
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List of Tables…………………………………………………………………….
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Glossary of Acronyms…………………………………………………………..
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1 INTRODUCTION……………………………………………………………
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1.1 Background………………………………………………………………..
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1.2 Research Goals……………………………………………………………
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1.3 Report Organization……………………………………………………….
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2 RF POWER AMPLIFIERS………………………………………………….
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2.1 Classes of PA operation……………………………………………………
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2.1.1 Class A……………………………………………………………….
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2.1.2 Class B……………………………………………………………….
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2.1.3 Class AB……………………………………………………………..
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2.1.4 Class C……………………………………………………………….
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2.2 Characteristics of power amplifiers………………………………………..
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2.2.1 Linearity……………………………………………………………..
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2.2.2 Measurement of Linearity……………………………………………
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2.2.2.1 1 dB Compression point……………………………………
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2.2.2.2 Intermodulation Distortion…………………………………..
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2.2.2.3 Third order Intercept point…………………………………..
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2.2.3 Efficiency……………………………………………………………
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2.2.4 Noise…………………………………………………………………
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2.3 LDMOS Power Transistors………………………………………………...
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2.4 Conclusion………………………………………………………………….
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3 DOHERTY POWER AMPLIFIERS………………………………………...
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3.1 Introduction…………………………………………………………………
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3.2 History of Doherty power amplifier………………………………………..
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3.3 Conventional DPA using vaccum tubes……………………………………
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3.4 The Modern Doherty power amplifier……………………………………...
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3.5 The Active load-pull technique……………………………………………
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3.6 Quarter wave transformer………………………………………………….
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3.7 Characteristic impedance calculation………………………………………
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3.8 Working Principle………………………………………………………….
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3.8.1 Stage I (Low level output signals)…………………………………...
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3.8.2 Stage II (Medium level output signals)……………………………...
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3.8.3 Stage III (High level output signals)…………………………………
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3.9 Performance of Doherty configuration……………………………………..
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3.10 Advantages and Disadvantages……………………………………………
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3.11 Conclusion…………………………………………………………………
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4 DESIGN AND IMPLEMENTATION……………………………………….
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4.1 Introduction…………………………………………………………………
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4.2 WCDMA specifications…………………………………………………….
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4.3 Design Architecture………………………………………………………...
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4.4 Choice of class of operation………………………………………………..
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4.5 Design Process……………………………………………………………...
4.5.1 Design of amplifier block…………………………………………….
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4.5.2 DC Analysis………………………………………………….………
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4.5.3 Determination of optimum load resistance…………………………..
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4.5.4 Input and Output matching…………………………………………..
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4.5.5 Biasing……………………………………………………………….
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4.5.6 Design of output combiner…………………………………………...
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4.6 Implementation…………………………………………………………….
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4.7 Conclusion………………………………………………………………….
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5 SIMULATION AND RESULTS…………………………………………….
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5.1 Introduction…………………………………………………………………
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5.2 Doherty Amplifier I………………………………………………………...
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5.2.1 Single tone simulations……………………………………………….
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5.2.2 Two tone simulations…………………………………………………
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5.3 Doherty Amplifier II………………………………………………………..
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5.4 Comparison of Doherty topologies………………………………………....
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5.5 Significance of load modulation……………………………………………
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5.6 Effect of main stage biasing on DPA………………………………………
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5.7 Effect of auxiliary stage biasing on DPA…………………………………..
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5.8 Conclusion………………………………………………………………….
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6 SUMMARY AND CONCLUSION………………………………………….
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6.1 Summary……………………………………………………………………
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6.2 Conclusion………………………………………………………………….
6.3 Future Directions…………………………………………………………...
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References……………………………………………………………………….
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