总线功能模型的设计方法

Belley

【文件名】:06426@52RD_bfm.rar
【格　式】:rar
【大　小】:42K
【简　介】:Testing designs to ensure bug free operation is a complex and laborious task. It is estimated that half of a project development involves testing the design, which significantly relates to the required man-effort and time-to-market of the design. As the design complexity and transistor
count increase, faster and more efficient methods to test the design are mandatory to ensure a bug free design. Utilizing Bus Functional Models enables less simulation overhead and can enable more complex functional test operations to be written.
【目　录】:
1.0 Introduction
2.0 Test Bench Basics
3.0 Modeling Devices as Bus Functional Models
4.0 BFM High-Level Testing Methodology
5.0 High Level Testing Paradigms and Caveats
6.0 Conclusion
7.0 References
8.0 Source Code Appendix