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【文件名】:06421@52RD_State Machine Coding Styles for Synthesis.rar
【格 式】:rar
【大 小】:124K
【简 介】:Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is a great paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's paper also offers in-depth background concerning the origin of specific state machine types.
This paper, "State Machine Coding Styles for Synthesis," details additional insights into state machine design including coding style approaches and a few additional tricks.
【目 录】:无目录
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