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论坛里有好多资料要RD币,我是新手,没钱呀,只好找出我存放多年的资料来换取点儿RD币.
芯片有点老啦,请考虑后再购买哟.
高通CDMA芯片MSM5105的完整手册,
标题:MSM5105™ Device Specification Preliminary Information
高通文档编号:93-V1705-1_X3.pdf
页数:502
语言:英文
1 Overview
1.1 Application Description ........................................................................... 1-1
1.2 MSM5105 Features.................................................................................. 1-4
1.2.1 MSM5105 Enhancements Over MSM5000 .......................... 1-4
1.2.2 MSM5105 General Features.................................................. 1-4
1.2.3 IS-2000 1x MC RTT Features supported by MSM5105 ....... 1-5
1.2.4 IS-2000 Features not supported by MSM5105...................... 1-5
1.2.5 MSM5105 Audio Processing Features .................................. 1-6
1.2.6 MSM5105 Microprocessor Subsystem.................................. 1-6
1.2.7 MSM5105 Supported Interface Features ............................... 1-7
1.3 External Circuit Considerations............................................................... 1-7
1.3.1 R-UIM.................................................................................... 1-7
1.3.2 USB Enhancements ............................................................... 1-7
1.3.3 Miscellaneous Changes.......................................................... 1-8
1.3.4 Memory Interface .................................................................. 1-8
1.3.5 MSM5105 Pinout Considerations.......................................... 1-9
2 Pin Descriptions
2.1 I/O Description Parameters...................................................................... 2-1
2.2 Pin Description Examples........................................................................ 2-2
2.3 Pin Names and Pinouts ............................................................................ 2-2
2.4 208-ball FBGA Pinout for MSM5105 (Top View)................................ 2-13
Contents MSM5105™ Device Specification Preliminary Information
iv QUALCOMM Proprietary 93-V1705-1 X3
3 Electrical Specifications
3.1 DC Electrical Specifications .................................................................... 3-1
3.1.1 Absolute Maximum Ratings .................................................. 3-1
3.1.2 Recommended Operating Conditions .................................... 3-2
3.1.3 DC Characteristics ................................................................. 3-2
3.1.4 General-purpose ADC Specifications.................................... 3-3
3.1.5 Codec Specifications.............................................................. 3-4
3.1.6 Power Consumption............................................................. 3-10
3.2 Timing Characteristics ........................................................................... 3-12
3.2.1 TCXO Timing...................................................................... 3-12
3.2.2 Rx Data Timing.................................................................... 3-12
3.2.3 PCM Interface...................................................................... 3-14
3.2.4 Auxiliary PCM Interface ..................................................... 3-16
3.2.5 Native Mode Microprocessor Timing.................................. 3-18
3.2.6 Bus Sizer Timing ................................................................. 3-21
3.2.7 LCD Timing......................................................................... 3-25
3.2.8 SBI Bus Timing ................................................................... 3-27
3.2.9 JTAG Timing ....................................................................... 3-28
4 Software Interface
4.1 Introduction.............................................................................................. 4-1
4.2 Conventions and Special Markings ......................................................... 4-2
4.3 Reserved Registers................................................................................... 4-2
4.4 Quick Reference by Address ................................................................... 4-3
4.5 Register Description .............................................................................. 4-36
4.5.1 Demodulator ........................................................................ 4-36
4.5.2 Modulator............................................................................. 4-94
4.5.3 UART2............................................................................... 4-119
4.5.4 Digital FM.......................................................................... 4-132
4.5.5 Web Core ........................................................................... 4-151
4.5.6 Clock Regimes ................................................................... 4-175
4.5.7 SBI ..................................................................................... 4-185
4.5.8 UART................................................................................. 4-190
4.5.9 USB Controller .................................................................. 4-203
4.5.10 Additional CAGC Registers .............................................. 4-221
4.5.11 TCXO PLL ........................................................................ 4-226
4.5.12 TCXO M/N Counter .......................................................... 4-228
4.5.13 Codec PLL ......................................................................... 4-230
4.5.14 SRCH2............................................................................... 4-232
4.5.15 Deinterleaver...................................................................... 4-248
4.5.16 First-level Interrupts .......................................................... 4-257
4.5.17 ASB.................................................................................... 4-269
4.6 QDSP2000 Software Interface............................................................. 4-282
4.6.1 Commands and Messages.................................................. 4-282
4.6.2 Direct Memory Access Interface ....................................... 4-293
5 Interface Descriptions
5.1 Overview.................................................................................................. 5-1
5.1.1 Organization of this Chapter.................................................. 5-3
5.2 The MSM5105 Mobile Station Modem ASIC Overview........................ 5-4
5.2.1 CDMA Subsystem ................................................................. 5-4
5.2.2 Digital FM Subsystem ........................................................... 5-4
5.2.3 RF Interface ........................................................................... 5-4
5.2.4 Audio Front End .................................................................... 5-5
5.2.5 ARM Microprocessor Subsystem.......................................... 5-5
5.2.6 UART..................................................................................... 5-5
5.2.7 USB........................................................................................ 5-5
5.2.8 Serial Bus Interface................................................................ 5-6
5.2.9 User Interface......................................................................... 5-6
5.2.10 General-purpose Interface Bus .............................................. 5-6
5.2.11 Mode Select and JTAG Interfaces ......................................... 5-6
5.3 RF Interface ............................................................................................. 5-7
5.3.1 Rx Path................................................................................... 5-8
5.3.2 Tx Path ................................................................................. 5-10
5.3.3 General-purpose PDMs........................................................ 5-11
5.3.4 MSM5105 Baseband Interface ............................................ 5-11
5.3.5 SBI Interface ........................................................................ 5-14
5.4 Audio Front End .................................................................................... 5-17
5.4.1 Functionality ........................................................................ 5-17
5.4.2 Codec ................................................................................... 5-20
5.4.3 Vocoder ................................................................................ 5-29
5.5 ARM Microprocessor and Peripherals .................................................. 5-37
5.5.1 Memory and Peripheral Interface Controller....................... 5-37
5.5.2 ARM Clock and Power Management.................................. 5-43
5.5.3 Reset and Pause ................................................................... 5-44
5.5.4 Watchdog Timer................................................................... 5-45
5.5.5 Interrupt Controller .............................................................. 5-47
5.6 Mode Select and Emulation Considerations .......................................... 5-52
5.6.1 Mode Selection Inputs ......................................................... 5-52
5.6.2 NATIVE Mode..................................................................... 5-52
5.6.3 MSM ICE Emulation Mode................................................. 5-52
5.6.4 HI-Z Mode ........................................................................... 5-59
5.6.5 JTAG Emulation .................................................................. 5-59
5.7 General-purpose Interface (GPIO_INT)................................................ 5-61
5.8 UART, R-UIM and USB Interfaces ....................................................... 5-64
5.8.1 UART................................................................................... 5-64
5.8.2 UART2................................................................................. 5-69
5.8.3 R-UIM (Removable-User Identify Module)........................ 5-70
5.8.4 USB Interface ...................................................................... 5-74
5.9 User Interface......................................................................................... 5-81
5.9.1 Keypad Interface.................................................................. 5-81
5.9.2 Ringer................................................................................... 5-81
5.9.3 LCD_CS_N and LCD_E ..................................................... 5-85
5.9.4 M/N Counter ........................................................................ 5-86
5.9.5 Auxiliary PCM Interface ..................................................... 5-86
5.10 GPADC Functional Description............................................................. 5-88
5.10.1 Analog Input Voltage Range................................................ 5-89
5.10.2 GPADC Operation ............................................................... 5-90
5.10.3 GPADC Conversion Time.................................................... 5-91
5.10.4 GPADC Analog Interface Considerations ........................... 5-92
5.11 Clock Regimes ....................................................................................... 5-94
5.11.1 TCXO................................................................................... 5-94
5.11.2 Codec PLL ........................................................................... 5-96
5.11.3 SLEEP Crystal Circuit for 32.768 kHz................................ 5-97
5.11.4 USB Crystal Circuit for 48 MHz......................................... 5-99
5.11.5 Subsystem Clock Regimes................................................... 5-99
5.12 JTAG Interface..................................................................................... 5-102
5.12.1 Test Access Port................................................................. 5-103
5.12.2 TAP Controller................................................................... 5-104
5.12.3 Data Registers .................................................................... 5-104
5.12.4 JTAG Instructions .............................................................. 5-106
6 Mechanical Dimensions
6.1 208-ball FBGA Package Outline ............................................................. 6-2
6.2 208-ball FBGA Land Pattern................................................................... 6-3
6.3 Part Marking ............................................................................................ 6-4
【文件名】:09530@52RD_93-V1705-1_X3.rar
【格 式】:rar
【大 小】:1883K
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