AN INTRODUCTION TO LV-LP analoge cmos design

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Summary
These course notes provide an introduction to topics in the
design of Low-Voltage Low-Power (LV-LP) Analog CMOS
design. The course is suitable for professional designers of
analog circuits and graduate engineers wishing to acquire
knowledge in this area.
Chapter 1
System related design issues for low-voltage low-power CMOS analog circuit design
1.1 Introduction .................................................................................................................. 4
1.2 Limits to Low Power for Analog Circuit Design ......................................................... 4
1.2.1 Fundamental Limits ........................................................................................ 4
1.2.2 Practical Limits ............................................................................................... 7
1.2.3 Other obstacles to low-power ......................................................................... 8
1.2.4 Implications of supply voltage reduction........................................................ 9
Chapter 2
General notes on the design of low-voltage, low-power operational amplifier cells
2.1 Introduction to low-voltage low-power CMOS circuits.............................................. 11
2.2 Design Issues .............................................................................................................. 11
2.3 Low Voltage Analog Design Condsiderations ........................................................... 12
2.3.1 Introduction................................................................................................... 12
2.3.2 Classification of CMOS low-voltage circuits................................................ 12
2.4 Electrical Properties of MOS transistors .................................................................... 13
2.4.1 Strong Inversion............................................................................................ 13
2.4.2 Weak Inversion ............................................................................................. 15
2.4.3 Moderate Inversion ....................................................................................... 16
2.5 Rail-to-Rail Signals ..................................................................................................... 17
2.5.1 The Inverting Amplifier................................................................................ 17
2.5.2 Non-Inverting Amplifier Configuration ....................................................... 18
2.5.3 Summary of Amplifier Configurations......................................................... 18
2.6 Rail-to-rail stages ........................................................................................................ 19
Chapter 3
Input stage design of low-voltage, low-power operational amplifier design
3.1 Introduction ................................................................................................................ 20
3.2 Single Differential Input Stage................................................................................... 20
3.3 Rail-to-Rail Input stage ............................................................................................... 23
3.4 Constant gm rail-to-rail input stages .......................................................................... 30
3.4.1 Rail-to-rail input stages with current based gm control................................ 30
Chapter 4
Output stage design of low-voltage, low power operational amplifiers
4.1 Introduction ................................................................................................................ 38
4.2 Common-Source Output Voltage ............................................................................... 38
4.3 Class AB output stages............................................................................................... 41
4.4 Feedforward class AB output stages .......................................................................... 45
4.5 Feedback class AB output stage ................................................................................. 51
List of References ........................................................................................................55

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